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A stack-oriented CPU implemented for a Spartan 3e FPGA in Verilog, with supporting peripherals.
2 Commits 1 Branch 0 Tags 48 KiB
Verilog 70.3%
Ruby 28.6%
Makefile 1.1%
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Jesse D. McDonald 8263fb4d98 Insert BUFG after DCM to reduce skew and eliminate a warning. 2013-02-10 19:55:49 -06:00
asm Import stack-oriented CPU design from Mercurial repository. 2013-02-09 12:46:27 -06:00
doc Import stack-oriented CPU design from Mercurial repository. 2013-02-09 12:46:27 -06:00
.gitignore Import stack-oriented CPU design from Mercurial repository. 2013-02-09 12:46:27 -06:00
Makefile Import stack-oriented CPU design from Mercurial repository. 2013-02-09 12:46:27 -06:00
arbiter.v Import stack-oriented CPU design from Mercurial repository. 2013-02-09 12:46:27 -06:00
assemble.rb Import stack-oriented CPU design from Mercurial repository. 2013-02-09 12:46:27 -06:00
cpu.v Import stack-oriented CPU design from Mercurial repository. 2013-02-09 12:46:27 -06:00
dma.v Import stack-oriented CPU design from Mercurial repository. 2013-02-09 12:46:27 -06:00
fifo.v Import stack-oriented CPU design from Mercurial repository. 2013-02-09 12:46:27 -06:00
irq_ctl.v Import stack-oriented CPU design from Mercurial repository. 2013-02-09 12:46:27 -06:00
nlz.v Import stack-oriented CPU design from Mercurial repository. 2013-02-09 12:46:27 -06:00
program.v Import stack-oriented CPU design from Mercurial repository. 2013-02-09 12:46:27 -06:00
rs232.v Import stack-oriented CPU design from Mercurial repository. 2013-02-09 12:46:27 -06:00
seven-seg.v Import stack-oriented CPU design from Mercurial repository. 2013-02-09 12:46:27 -06:00
sram.v Import stack-oriented CPU design from Mercurial repository. 2013-02-09 12:46:27 -06:00
stack.v Import stack-oriented CPU design from Mercurial repository. 2013-02-09 12:46:27 -06:00
timer.v Import stack-oriented CPU design from Mercurial repository. 2013-02-09 12:46:27 -06:00
toplevel.prj Import stack-oriented CPU design from Mercurial repository. 2013-02-09 12:46:27 -06:00
toplevel.ucf Import stack-oriented CPU design from Mercurial repository. 2013-02-09 12:46:27 -06:00
toplevel.v Insert BUFG after DCM to reduce skew and eliminate a warning. 2013-02-10 19:55:49 -06:00
toplevel.xst Import stack-oriented CPU design from Mercurial repository. 2013-02-09 12:46:27 -06:00